Transition metal dichalcogenide — the flat transistor

Atomically thin semiconductors could extend transistor scaling. We examine their advantages and the manufacturing, contact and integration challenges standing between laboratory devices and practical electronics.

The nanosheet era of transistor geometry has once again extended the life of transistor scaling. The projected progression from separated n-/p-type nanosheets, to forksheets where n- and p-type devices are brought closer together and separated by a dielectric wall, and ultimately to complementary field-effect transistors, where n- and p-type devices are stacked on top of one another, has opened up significant scaling opportunities. By surrounding the channel on all four sides with the gate, these architectures provide better electrostatic control while increasingly exploiting the vertical dimension. As scaling proceeds into the sub-nanometre regime, however, conventional silicon is approaching intrinsic material limits, including mobility degradation caused by silicon/oxide interface scattering and increased leakage associated with quantum-mechanical tunnelling. This has prompted the industry to explore alternatives beyond silicon.

Two-dimensional materials (2DMs) have attracted rapidly growing interest since the first isolation of graphene in the early 2000s. Monolayer transition metal dichalcogenides (TMDs), the semiconducting poster child of 2DMs, emerged prominently in the early 2010s and have since been proposed as promising candidates to replace silicon as transistor scaling enters the nanosheet and sub-nanometre era. TMDs are atomically thin semiconductors with surfaces free of dangling bonds, offering excellent electrostatic control even at monolayer thicknesses. Their lack of dangling bonds also allows lattice-dissimilar materials to be stacked through van der Waals interactions, enabling heterogeneous vertical integration without the strict lattice-matching requirements of conventional epitaxy. Their inherent thinness also makes ultrathin devices possible (provided that other transistor components, such as gate dielectrics and contacts, can be scaled accordingly), potentially facilitating ultra-dense vertical stacking.

Yet despite these advantages, numerous challenges must still be addressed before the practical implementation of 2DM-based electronics. After decades of development around silicon, the semiconductor industry is not immediately ready to accommodate an entirely new family of materials. Almost every aspect of the transistor requires new research and process considerations when 2DMs are introduced. This begins with something as fundamental as obtaining the TMD itself: should it be grown directly on the final substrate, potentially sacrificing optimal growth conditions to protect structures already present underneath, or grown separately on a sacrificial substrate under better conditions and then transferred onto the final substrate, potentially introducing contamination or defects? Challenges continue into post-synthesis processing, particularly contact engineering and dielectric integration. The chemical inertness and dangling-bond-free surfaces of 2DMs complicate conventional oxide nucleation and metal-contacting approaches, creating new difficulties in achieving both low-resistance contacts and uniform, low-defect high-k gate dielectrics.

Researchers are becoming increasingly aware of the importance of fab-compatible processing conditions and often incorporate individual constraints, such as limiting processing temperatures to below 400 °C. However, most studies cannot simultaneously satisfy the full set of requirements expected of a semiconductor fabrication process. As a result, many promising demonstrations remain far from constituting an industry-ready process technology.